`ifndef _CHUNJUN_LIB_DEFINE_
`define _CHUNJUN_LIB_DEFINE_
`ifndef __LIB_DEFINE__
`define __LIB_DEFINE__



`define UBTB_INDEX_GEN(__pred_pc, __pred_index)      \
    assign __pred_index = {__pred_pc[6]^__pred_pc[7], __pred_pc[5] ^ __pred_pc[8],__pred_pc[4:3]} ;



//================================================================================================
//===================================== WXB BUS INF DEFINE =======================================
//================================================================================================

`ifndef WXB_TYPEDEF_REQ_INFO_T
`define WXB_TYPEDEF_REQ_INFO_T(wxb_req_info_t, ADDR_W, ID_W, DATA_W, SIZE_W)\
typedef struct packed {                 \
    logic [ID_W-1:0]          id      ; \
    logic [ADDR_W-1:0]        addr    ; \
    logic [SIZE_W-1:0]        size    ; \
    logic                     write   ; \
    logic [DATA_W-1:0]        wdata   ; \
    logic [DATA_W/8-1:0]      wstrb   ; \
    logic [1:0]               prot    ; \
    logic [3:0]               memattr ; \
    logic [5:0]               atop    ; \
    logic                     excl    ; \
    logic                     master  ; \
} wxb_req_info_t ;
`endif //WXB_TYPEDEF_REQ_INFO_T

`ifndef WXB_TYPEDEF_RSP_INFO_T
`define WXB_TYPEDEF_RSP_INFO_T(wxb_rsp_info_t, ID_W, DATA_W, RESP_W) \
typedef struct packed {               \
    logic [ID_W-1:0]         id      ;\
    logic [RESP_W-1:0]       err     ;\
    logic [DATA_W-1:0]       rdata   ;\
    logic                    excl_ok ;\
} wxb_rsp_info_t ;
`endif //WXB_TYPEDEF_RSP_INFO_T

`ifndef WXB_TYPEDEF_ALL
`define WXB_TYPEDEF_ALL(__name, ADDR_W, ID_W, DATA_W, SIZE_W, RESP_W)             \
    `WXB_TYPEDEF_REQ_INFO_T(__name``_wxb_req_info_t, ADDR_W, ID_W, DATA_W, SIZE_W)\
    `WXB_TYPEDEF_RSP_INFO_T(__name``_wxb_rsp_info_t, ID_W, DATA_W, RESP_W)
`endif //WXB_TYPEDEF_ALL


//================================================================================================
//===================================== AXI BUS INF DEFINE =======================================
//================================================================================================

`ifndef AXI_TYPEDEF_REQ_AW_T
`define AXI_TYPEDEF_REQ_AW_T(AXI_REQ_AW_T, ADDR_W, ID_W)\
typedef struct packed {                     \
    logic [ID_W-1:0]               awid    ;\
    logic [ADDR_W-1:0]             awaddr  ;\
    logic [2:0]                    awsize  ;\
    logic [7:0]                    awlen   ;\
    logic [1:0]                    awburst ;\
    logic                          awlock  ;\
    logic [3:0]                    awcache ;\
    logic [2:0]                    awprot  ;\
    logic [5:0]                    awatop  ;\
    logic                          awmaster;\
    logic                          awnse   ;\
} AXI_REQ_AW_T;                                          
`endif //AXI_TYPEDEF_REQ_AW_T

`ifndef AXI_TYPEDEF_REQ_AR_T
`define AXI_TYPEDEF_REQ_AR_T(axi_req_ar_t, ADDR_W, ID_W)\
typedef struct packed {                     \
    logic [ID_W-1:0]               arid    ;\
    logic [ADDR_W-1:0]             araddr  ;\
    logic [2:0]                    arsize  ;\
    logic [7:0]                    arlen   ;\
    logic [1:0]                    arburst ;\
    logic                          arlock  ;\
    logic [3:0]                    arcache ;\
    logic [2:0]                    arprot  ;\
    logic                          armaster;\
    logic                          arnse   ;\
} axi_req_ar_t;    
`endif //AXI_TYPEDEF_REQ_AR_T

`ifndef AXI_TYPEDEF_REQ_W_T
`define AXI_TYPEDEF_REQ_W_T(axi_req_w_t, DATA_W)\
typedef struct packed {                     \
    logic [DATA_W-1:0]     wdata   ;\
    logic [DATA_W/8-1:0]   wstrb   ;\
    logic                  wlast   ;\
    logic                  wpoison ;\
} axi_req_w_t;                                          
`endif //AXI_TYPEDEF_REQ_W_T

`ifndef AXI_TYPEDEF_RSP_B_T
`define AXI_TYPEDEF_RSP_B_T(axi_rsp_b_t, ID_W)\
typedef struct packed {       \
    logic [ID_W-1:0]   bid   ;\
    logic [1:0]        bresp ;\
} axi_rsp_b_t;                                          
`endif //AXI_TYPEDEF_RSP_B_T

`ifndef AXI_TYPEDEF_RSP_R_T
`define AXI_TYPEDEF_RSP_R_T(axi_rsp_r_t, ID_W, DATA_W)\
typedef struct packed {          \
    logic [ID_W-1:0]    rid     ;\
    logic [1:0]         rresp   ;\
    logic [DATA_W-1:0]  rdata   ;\
    logic               rlast   ;\
    logic               rpoison ;\
} axi_rsp_r_t;                                          
`endif //AXI_TYPEDEF_RSP_R_T

`ifndef AXI_TYPEDEF_ALL
`define AXI_TYPEDEF_ALL(__name, ADDR_W, ID_W, DATA_W)          \
    `AXI_TYPEDEF_REQ_AW_T(__name``_axi_req_aw_t, ADDR_W, ID_W) \
    `AXI_TYPEDEF_REQ_AR_T(__name``_axi_req_ar_t, ADDR_W, ID_W) \
    `AXI_TYPEDEF_REQ_W_T (__name``_axi_req_w_t , DATA_W)       \
    `AXI_TYPEDEF_RSP_B_T (__name``_axi_rsp_b_t , ID_W)         \
    `AXI_TYPEDEF_RSP_R_T (__name``_axi_rsp_r_t , ID_W, DATA_W )
`endif //AXI_TYPEDEF_ALL

//================================================================================================
//================================AXI CHECK BUS INF DEFINE =======================================
//================================================================================================

`ifndef AXI_TYPEDEF_REQ_AW_CHK_T
`define AXI_TYPEDEF_REQ_AW_CHK_T(axi_req_aw_chk_t, ADDR_W, ID_W)\
typedef struct packed {                     \
    logic [((ID_W-1)/8):0]     awidchk     ;\
    logic [((ADDR_W-1)/8):0]   awaddrchk   ;\
    logic                      awlenchk    ;\
    logic                      awarctlchk0 ;\
    logic                      awarctlchk1 ;\
    logic                      awarctlchk3 ;\
} axi_req_aw_chk_t;
`endif //AXI_TYPEDEF_REQ_AW_CHK_T

`ifndef AXI_TYPEDEF_REQ_AR_CHK_T
`define AXI_TYPEDEF_REQ_AR_CHK_T(axi_req_ar_chk_t, ADDR_W, ID_W)\
typedef struct packed {                                         \
    logic [((ID_W-1)/8)-1:0]  aridchk     ;                     \
    logic [((ADDR_W-1)/8)-1:0]araddrchk   ;                     \
    logic                     arlenchk    ;                     \
    logic                     ararctlchk0 ;                     \
    logic                     ararctlchk1 ;                     \
} axi_req_ar_chk_t;
`endif //AXI_TYPEDEF_REQ_AR_CHK_T

`ifndef AXI_TYPEDEF_REQ_W_CHK_T
`define AXI_TYPEDEF_REQ_W_CHK_T(axi_req_w_chk_t, DATA_W)  \
typedef struct packed {                                   \
    logic [((DATA_W-1)/8):0]     wdatachk ;               \
    logic [((DATA_W-1)/64):0]    wstrbchk ;               \
    logic                        wlastchk ;               \
    logic [((DATA_W-1)/512):0]   wpoisonchk;              \
} axi_req_w_chk_t;
`endif //AXI_TYPEDEF_REQ_W_CHK_T

`ifndef AXI_TYPEDEF_RSP_B_CHK_T
`define AXI_TYPEDEF_RSP_B_CHK_T(axi_rsp_b_chk_t, ID_W)\
typedef struct packed {                               \
    logic [((ID_W-1)/8):0]    bidchk     ;            \
    logic                     brespchk   ;            \
} axi_rsp_b_chk_t;
`endif //AXI_TYPEDEF_RSP_B_CHK_T



`ifndef AXI_TYPEDEF_RSP_R_CHK_T
`define AXI_TYPEDEF_RSP_R_CHK_T(axi_rsp_r_chk_t, ID_W, DATA_W)\
typedef struct packed {                                       \
    logic [((ID_W-1)/8):0]       ridchk     ;                 \
    logic [((DATA_W-1)/8):0]     rdatachk   ;                 \
    logic                        rlastchk   ;                 \
    logic [((DATA_W-1)/512):0]   rpoisonchk ;                 \
    logic                        rrespchk   ;                 \
} axi_rsp_r_chk_t;
`endif //AXI_TYPEDEF_RSP_R_CHK_T


`ifndef AXI_TYPEDEF_CHK_ALL
`define AXI_TYPEDEF_CHK_ALL(__name, ADDR_W, ID_W, DATA_W)          \
    `AXI_TYPEDEF_REQ_AW_CHK_T(__name``_axi_req_aw_chk_t, ADDR_W, ID_W) \
    `AXI_TYPEDEF_REQ_AR_CHK_T(__name``_axi_req_ar_chk_t, ADDR_W, ID_W) \
    `AXI_TYPEDEF_REQ_W_CHK_T (__name``_axi_req_w_chk_t , DATA_W)       \
    `AXI_TYPEDEF_RSP_B_CHK_T (__name``_axi_rsp_b_chk_t , ID_W)         \
    `AXI_TYPEDEF_RSP_R_CHK_T (__name``_axi_rsp_r_chk_t , ID_W, DATA_W )
`endif //AXI_TYPEDEF_CHK_ALL

//================================================================================================
//===================================== AHB BUS INF DEFINE =======================================
//================================================================================================

`ifndef AHB_TYPEDEF_REQ_T
`define AHB_TYPEDEF_REQ_T(ahb_req_t, ADDR_W) \
typedef struct packed {                      \
    logic [ADDR_W-1:0]       haddr     ;     \
    logic [2:0]              hburst    ;     \
    logic                    hmastlock ;     \
    logic [3:0]              hprot     ;     \
    logic [2:0]              hsize     ;     \
    logic                    hmaster   ;     \
    logic                    hexcl     ;     \
    logic                    hwrite    ;     \
    logic                    misc      ;     \
} ahb_req_t ;
`endif //AHB_TYPEDEF_REQ_T

`ifndef AHB_TYPEDEF_RSP_T
`define AHB_TYPEDEF_RSP_T(ahb_rsp_t, DATA_W)\
typedef struct packed {           \
    logic [DATA_W-1:0] hrdata    ;\
    logic              hresp     ;\
    logic              hexokay   ;\
} ahb_rsp_t ;
`endif //AHB_TYPEDEF_RSP_T


`ifndef AHB_TYPEDEF_ALL
`define AHB_TYPEDEF_ALL(__name, ADDR_W, DATA_W)   \
    `AHB_TYPEDEF_REQ_T(__name``_ahb_req_t, ADDR_W)      \
    `AHB_TYPEDEF_RSP_T(__name``_ahb_rsp_t, DATA_W)      
`endif //AHB_TYPEDEF_ALL



//================================================================================================
//================================AHB CHECK BUS INF DEFINE =======================================
//================================================================================================

`ifndef AHB_TYPEDEF_REQ_CHK_T
`define AHB_TYPEDEF_REQ_CHK_T(ahb_req_chk_t, ADDR_W)\
typedef struct packed {                \
    logic [((ADDR_W-1)/8):0] haddrchk ;\
    logic                    hctclchk1;\
    logic                    hctclchk2;\
    logic                    hprotchk ;\
    logic                    hauserchk;\
}ahb_req_chk_t ;
`endif //AHB_TYPEDEF_REQ_CHK_T

`ifndef AHB_TYPEDEF_RSP_CHK_T
`define AHB_TYPEDEF_RSP_CHK_T(ahb_rsp_chk_t, DATA_W) \
typedef struct packed {\
    logic [((DATA_W-1)/8):0] hrdatachk;\
    logic                    hrespchk ;\
}ahb_rsp_chk_t ;
`endif // AHB_TYPEDEF_RSP_CHK_T

`ifndef AHB_TYPEDEF_CHK_ALL
`define AHB_TYPEDEF_CHK_ALL(__name, ADDR_W, DATA_W)        \
    `AHB_TYPEDEF_REQ_CHK_T(__name``_ahb_req_chk_t, ADDR_W) \
    `AHB_TYPEDEF_RSP_CHK_T(__name``_ahb_rsp_chk_t, DATA_W)
`endif //AHB_TYPEDEF_CHK_ALL


`endif // __LIB_DEFINE__ 
 

 `define __CHUNJUN_VU_PKG__
 
package chunjun_vu_pkg;

localparam VREDU_DLEN                    = `CHUNJUN_VPU_DLEN_W > 512 ? 512 : `CHUNJUN_VPU_DLEN_W;
localparam VREDU_DLEN_W                  = $clog2(VREDU_DLEN);

localparam VMASK_DLEN                    = `CHUNJUN_VPU_DLEN_W > 256 ? 256 : `CHUNJUN_VPU_DLEN_W;
localparam VMASK_DLEN_W                  = $clog2(VMASK_DLEN);

//VPERM0(slideup,slidedn,slide1up,slide1dn)
localparam VPERM0_DLEN                   = `CHUNJUN_VPU_DLEN_W;
localparam VPERM0_DLEN_W                 = $clog2(VPERM0_DLEN);

//VPERM1(vcompress)
localparam VPERM1_DLEN                   = `CHUNJUN_VPU_DLEN_W > 64 ? 64 : `CHUNJUN_VPU_DLEN_W;
localparam VPERM1_DLEN_W                 = $clog2(VPERM1_DLEN);

localparam VPERM_DLEN                    = VPERM0_DLEN > VPERM1_DLEN ? VPERM0_DLEN : VPERM1_DLEN;
 
localparam VMUL_DLEN                     = `CHUNJUN_VPU_DLEN_W;
localparam VMUL_DLEN_W                   = $clog2(VMUL_DLEN);

localparam VALU_DLEN                     = `CHUNJUN_VPU_DLEN_W;
localparam VALU_DLEN_W                   = $clog2(VALU_DLEN);
 
localparam VDIV_DLEN                     = `CHUNJUN_VPU_DLEN_W;
localparam VDIV_DLEN_W                   = $clog2(VDIV_DLEN);

localparam SUB_TYPE_W                    = 18;
localparam CNT_W                         = `CHUNJUN_VPU_UVL_W;
localparam CMP_CNT_W                     = $clog2(`CHUNJUN_VPU_DLEN_W / (VALU_DLEN / 32));
localparam DLEN_IDX_W                    = CNT_W > CMP_CNT_W ? CNT_W : CMP_CNT_W;
 
localparam VPU_DLEN_UVL_EEW08            = `CHUNJUN_VPU_DLEN_W / 08;
localparam VPU_DLEN_UVL_EEW16            = `CHUNJUN_VPU_DLEN_W / 16;
localparam VPU_DLEN_UVL_EEW32            = `CHUNJUN_VPU_DLEN_W / 32;

localparam VPU_DLEN_UVL_EEW08_W          = $clog2(VPU_DLEN_UVL_EEW08);
localparam VPU_DLEN_UVL_EEW16_W          = $clog2(VPU_DLEN_UVL_EEW16);
localparam VPU_DLEN_UVL_EEW32_W          = $clog2(VPU_DLEN_UVL_EEW32);

localparam VMISC_DLEN                    = `CHUNJUN_VPU_DLEN_W;
localparam VMISC_DLEN_W                  = $clog2(VMISC_DLEN);
/////////////////////////////////////////////////////////////////////////////////////////////////////
//                              onehot sub_type
/////////////////////////////////////////////////////////////////////////////////////////////////////
localparam VALU_IS_SIGNED                = 00;
localparam VALU_IS_VADD                  = 01;
localparam VALU_IS_VSADD                 = 02;
localparam VALU_IS_VSSUB                 = 03;
localparam VALU_IS_VAADD                 = 04;
localparam VALU_IS_VSLL                  = 05;
localparam VALU_IS_VSRL                  = 06;
localparam VALU_IS_VNSRL                 = 07;
localparam VALU_IS_VSSRL                 = 08;
localparam VALU_IS_VNCLIP                = 09;
localparam VALU_IS_VAND                  = 10;
localparam VALU_IS_VOR                   = 11;
localparam VALU_IS_VXOR                  = 12;
localparam VALU_IS_VMSEQ                 = 13;
localparam VALU_IS_VMSNE                 = 14;
localparam VALU_IS_VCMP                  = 15;
localparam VALU_IS_VMAX                  = 16;
localparam VALU_IS_VMIN                  = 17;
 
localparam VMUL_IS_VMULH                 = 00;
localparam VMUL_IS_VMAC                  = 01;
localparam VMUL_IS_VSMUL                 = 02;
 
localparam VREDU_IS_SIGNED               = 00;
localparam VREDU_IS_VREDSUM              = 01;
localparam VREDU_IS_VREDMIN              = 02;
localparam VREDU_IS_VREDMAX              = 03;
localparam VREDU_IS_VREDAND              = 04;
localparam VREDU_IS_VREDOR               = 05;
localparam VREDU_IS_VREDXOR              = 06;
 
localparam VMASK_IS_VMAND                = 00;
localparam VMASK_IS_VMNAND               = 01;
localparam VMASK_IS_VMANDN               = 02;
localparam VMASK_IS_VMXOR                = 03;
localparam VMASK_IS_VMOR                 = 04;
localparam VMASK_IS_VMNOR                = 05;
localparam VMASK_IS_VMORN                = 06;
localparam VMASK_IS_VMXNOR               = 07;
localparam VMASK_IS_VCPOP                = 08;
localparam VMASK_IS_VFIRST               = 09;
localparam VMASK_IS_VMSOF                = 10;
localparam VMASK_IS_VMSIF                = 11;
localparam VMASK_IS_VMSBF                = 12;
localparam VMASK_IS_VIOTA                = 13;
localparam VMASK_IS_VID                  = 14;
 
localparam VPERM_IS_VSLIDEUP             = 00;
localparam VPERM_IS_VSLIDE1UP            = 01;
localparam VPERM_IS_VFSLIDE1UP           = 02;
localparam VPERM_IS_VSLIDEDN             = 03;
localparam VPERM_IS_VSLIDE1DN            = 04;
localparam VPERM_IS_VFSLIDE1DN           = 05;
localparam VPERM_IS_VCOMPRESS            = 06;
 
localparam VDIV_IS_SIGNED                = 00;
localparam VDIV_IS_VDIV                  = 01;
localparam VDIV_IS_VREM                  = 02;

//vmask localparam(VMASK0->logical,pop,first,sif,sof,sbf;VMASK1->viota,vid)

localparam VMASK0_UVL                    = VMASK_DLEN;       //in charge of logical,pop,first,sif,sof,sbf 
localparam VMASK1_UVL_EEW08              = VMASK_DLEN / 08;  //in charge of viota,vid
localparam VMASK1_UVL_EEW16              = VMASK_DLEN / 16;  //in charge of viota,vid
localparam VMASK1_UVL_EEW32              = VMASK_DLEN / 32;  //in charge of viota,vid

localparam VMASK_DATA_SEGNUM             = `CHUNJUN_VPU_DLEN_W / VMASK_DLEN;
localparam VMASK0_MASK_SEGNUM            = `CHUNJUN_VPU_DLEN_W / VMASK_DLEN;
localparam VMASK1_MASK_SEGNUM_EEW08      = `CHUNJUN_VPU_DLEN_W / VMASK_DLEN * 08;
localparam VMASK1_MASK_SEGNUM_EEW16      = `CHUNJUN_VPU_DLEN_W / VMASK_DLEN * 16;
localparam VMASK1_MASK_SEGNUM_EEW32      = `CHUNJUN_VPU_DLEN_W / VMASK_DLEN * 32;

localparam VMASK_DATA_SEGNUM_W           = $clog2(VMASK_DATA_SEGNUM);
localparam VMASK0_MASK_SEGNUM_W          = $clog2(VMASK0_MASK_SEGNUM);
localparam VMASK1_MASK_SEGNUM_EEW08_W    = $clog2(VMASK1_MASK_SEGNUM_EEW08);
localparam VMASK1_MASK_SEGNUM_EEW16_W    = $clog2(VMASK1_MASK_SEGNUM_EEW16);
localparam VMASK1_MASK_SEGNUM_EEW32_W    = $clog2(VMASK1_MASK_SEGNUM_EEW32);

localparam VMASK0_UVL_W                  = $clog2(VMASK0_UVL);
localparam VMASK1_UVL_EEW08_W            = $clog2(VMASK1_UVL_EEW08);
localparam VMASK1_UVL_EEW16_W            = $clog2(VMASK1_UVL_EEW16);
localparam VMASK1_UVL_EEW32_W            = $clog2(VMASK1_UVL_EEW32);

//vreduction localparam

localparam VREDU_UVL_EEW08               = VREDU_DLEN / 08;
localparam VREDU_UVL_EEW16               = VREDU_DLEN / 16;
localparam VREDU_UVL_EEW32               = VREDU_DLEN / 32;

localparam VREDU_UVL_EEW08_W             = $clog2(VREDU_DLEN / 08);
localparam VREDU_UVL_EEW16_W             = $clog2(VREDU_DLEN / 16);
localparam VREDU_UVL_EEW32_W             = $clog2(VREDU_DLEN / 32);

localparam VWREDU_DATA_SEGNUM            = `CHUNJUN_VPU_DLEN_W / VREDU_DLEN * 2;
localparam VREDU_DATA_SEGNUM             = `CHUNJUN_VPU_DLEN_W / VREDU_DLEN;

localparam VWREDU_DATA_SEGNUM_W          = $clog2(VWREDU_DATA_SEGNUM);
localparam VREDU_DATA_SEGNUM_W           = $clog2(VREDU_DATA_SEGNUM);

localparam VWREDU_MASK_SEGNUM_EEW08      = (`CHUNJUN_VPU_DLEN_W / 04) / (VREDU_DLEN / 08);
localparam VWREDU_MASK_SEGNUM_EEW16      = (`CHUNJUN_VPU_DLEN_W / 08) / (VREDU_DLEN / 16);
localparam VWREDU_MASK_SEGNUM_EEW32      = (`CHUNJUN_VPU_DLEN_W / 16) / (VREDU_DLEN / 32);

localparam VREDU_MASK_SEGNUM_EEW08       = `CHUNJUN_VPU_DLEN_W / VREDU_DLEN;
localparam VREDU_MASK_SEGNUM_EEW16       = `CHUNJUN_VPU_DLEN_W / VREDU_DLEN;
localparam VREDU_MASK_SEGNUM_EEW32       = `CHUNJUN_VPU_DLEN_W / VREDU_DLEN;

localparam VWREDU_MASK_SEGNUM_EEW08_W    = $clog2(VWREDU_MASK_SEGNUM_EEW08);
localparam VWREDU_MASK_SEGNUM_EEW16_W    = $clog2(VWREDU_MASK_SEGNUM_EEW16);
localparam VWREDU_MASK_SEGNUM_EEW32_W    = $clog2(VWREDU_MASK_SEGNUM_EEW32);

localparam VREDU_MASK_SEGNUM_EEW08_W     = $clog2(VREDU_MASK_SEGNUM_EEW08 );
localparam VREDU_MASK_SEGNUM_EEW16_W     = $clog2(VREDU_MASK_SEGNUM_EEW16 );
localparam VREDU_MASK_SEGNUM_EEW32_W     = $clog2(VREDU_MASK_SEGNUM_EEW32 );

//vpermutation localparam(VPERM0->slideup,slidedn,slide1up,slide1dn;VPERM1->compress)
//VPERM0
 
localparam VPERM0_UVL_EEW08              = VPERM0_DLEN / 08;
localparam VPERM0_UVL_EEW16              = VPERM0_DLEN / 16;
localparam VPERM0_UVL_EEW32              = VPERM0_DLEN / 32;

localparam VPERM0_UVL_EEW08_W            = $clog2(VPERM0_UVL_EEW08);
localparam VPERM0_UVL_EEW16_W            = $clog2(VPERM0_UVL_EEW16);
localparam VPERM0_UVL_EEW32_W            = $clog2(VPERM0_UVL_EEW32);

localparam VPERM0_DATA_SEGNUM            = `CHUNJUN_VPU_DLEN_W / VPERM0_DLEN;
localparam VPERM0_DATA_SEGNUM_W          = $clog2(VPERM0_DATA_SEGNUM);

localparam VPERM0_MASK_SEGNUM_EEW08      = `CHUNJUN_VPU_DLEN_W / VPERM0_DLEN;
localparam VPERM0_MASK_SEGNUM_EEW16      = `CHUNJUN_VPU_DLEN_W / VPERM0_DLEN;
localparam VPERM0_MASK_SEGNUM_EEW32      = `CHUNJUN_VPU_DLEN_W / VPERM0_DLEN;

localparam VPERM0_MASK_SEGNUM_EEW08_W    = $clog2(VPERM0_MASK_SEGNUM_EEW08);
localparam VPERM0_MASK_SEGNUM_EEW16_W    = $clog2(VPERM0_MASK_SEGNUM_EEW16);
localparam VPERM0_MASK_SEGNUM_EEW32_W    = $clog2(VPERM0_MASK_SEGNUM_EEW32);

localparam VLMAX_LMUL0_S1_EEW08          = `CHUNJUN_VPU_VLEN_W * 1 / 08 - 1;
localparam VLMAX_LMUL0_S1_EEW16          = `CHUNJUN_VPU_VLEN_W * 1 / 16 - 1;
localparam VLMAX_LMUL0_S1_EEW32          = `CHUNJUN_VPU_VLEN_W * 1 / 32 - 1;

localparam VLMAX_LMUL1_S1_EEW08          = `CHUNJUN_VPU_VLEN_W * 2 / 08 - 1;
localparam VLMAX_LMUL1_S1_EEW16          = `CHUNJUN_VPU_VLEN_W * 2 / 16 - 1;
localparam VLMAX_LMUL1_S1_EEW32          = `CHUNJUN_VPU_VLEN_W * 2 / 32 - 1;

localparam VLMAX_LMUL2_S1_EEW08          = `CHUNJUN_VPU_VLEN_W * 4 / 08 - 1;
localparam VLMAX_LMUL2_S1_EEW16          = `CHUNJUN_VPU_VLEN_W * 4 / 16 - 1;
localparam VLMAX_LMUL2_S1_EEW32          = `CHUNJUN_VPU_VLEN_W * 4 / 32 - 1;

localparam VLMAX_LMUL3_S1_EEW08          = `CHUNJUN_VPU_VLEN_W * 8 / 08 - 1;
localparam VLMAX_LMUL3_S1_EEW16          = `CHUNJUN_VPU_VLEN_W * 8 / 16 - 1;
localparam VLMAX_LMUL3_S1_EEW32          = `CHUNJUN_VPU_VLEN_W * 8 / 32 - 1;

localparam VLMAX_LMUL5_S1_EEW08          = `CHUNJUN_VPU_VLEN_W / 8 / 08 - 1;
localparam VLMAX_LMUL5_S1_EEW16          = `CHUNJUN_VPU_VLEN_W / 8 / 16 - 1;
localparam VLMAX_LMUL5_S1_EEW32          = `CHUNJUN_VPU_VLEN_W / 8 / 32 - 1;

localparam VLMAX_LMUL6_S1_EEW08          = `CHUNJUN_VPU_VLEN_W / 4 / 08 - 1;
localparam VLMAX_LMUL6_S1_EEW16          = `CHUNJUN_VPU_VLEN_W / 4 / 16 - 1;
localparam VLMAX_LMUL6_S1_EEW32          = `CHUNJUN_VPU_VLEN_W / 4 / 32 - 1;

localparam VLMAX_LMUL7_S1_EEW08          = `CHUNJUN_VPU_VLEN_W / 2 / 08 - 1;
localparam VLMAX_LMUL7_S1_EEW16          = `CHUNJUN_VPU_VLEN_W / 2 / 16 - 1;
localparam VLMAX_LMUL7_S1_EEW32          = `CHUNJUN_VPU_VLEN_W / 2 / 32 - 1;

//VPERM1

localparam VPERM1_DATA_SEGNUM            = `CHUNJUN_VPU_DLEN_W / VPERM1_DLEN;
localparam VPERM1_DATA_SEGNUM_W          = $clog2(VPERM1_DATA_SEGNUM);
 
localparam VPERM1_MASK_SEGNUM_EEW08      = `CHUNJUN_VPU_DLEN_W / VPERM1_DLEN * 08;
localparam VPERM1_MASK_SEGNUM_EEW16      = `CHUNJUN_VPU_DLEN_W / VPERM1_DLEN * 16;
localparam VPERM1_MASK_SEGNUM_EEW32      = `CHUNJUN_VPU_DLEN_W / VPERM1_DLEN * 32;

localparam VPERM1_MASK_SEGNUM_EEW08_W    = $clog2(VPERM1_MASK_SEGNUM_EEW08);
localparam VPERM1_MASK_SEGNUM_EEW16_W    = $clog2(VPERM1_MASK_SEGNUM_EEW16);
localparam VPERM1_MASK_SEGNUM_EEW32_W    = $clog2(VPERM1_MASK_SEGNUM_EEW32);

localparam VPERM1_UVL_EEW08              = VPERM1_DLEN / 08;
localparam VPERM1_UVL_EEW16              = VPERM1_DLEN / 16;
localparam VPERM1_UVL_EEW32              = VPERM1_DLEN / 32;

localparam VPERM1_UVL_EEW08_W            = $clog2(VPERM1_UVL_EEW08);
localparam VPERM1_UVL_EEW16_W            = $clog2(VPERM1_UVL_EEW16);
localparam VPERM1_UVL_EEW32_W            = $clog2(VPERM1_UVL_EEW32);

//vmul localparam(VMUL->normal mul , mac; VWMUL->widen mul, mac)

localparam VMUL_UVL_EEW08                = VMUL_DLEN / 08;
localparam VMUL_UVL_EEW16                = VMUL_DLEN / 16;
localparam VMUL_UVL_EEW32                = VMUL_DLEN / 32;

localparam VMUL_UVL_EEW08_W              = $clog2(VMUL_UVL_EEW08);
localparam VMUL_UVL_EEW16_W              = $clog2(VMUL_UVL_EEW16);
localparam VMUL_UVL_EEW32_W              = $clog2(VMUL_UVL_EEW32);

localparam VMUL_DATA_SEGNUM              = `CHUNJUN_VPU_DLEN_W / VMUL_DLEN;
localparam VMUL_DATA_SEGNUM_W            = $clog2(VMUL_DATA_SEGNUM);

localparam VWMUL_DATA_SEGNUM             = `CHUNJUN_VPU_DLEN_W / VMUL_DLEN * 2;
localparam VWMUL_DATA_SEGNUM_W           = $clog2(VWMUL_DATA_SEGNUM);

localparam VMUL_LANE_EEW08               = VMUL_DLEN / 08;
localparam VMUL_LANE_EEW16               = VMUL_DLEN / 16;
localparam VMUL_LANE_EEW32               = VMUL_DLEN / 32;

localparam VMUL_MASK_SEGNUM_EEW08        = `CHUNJUN_VPU_DLEN_W / VMUL_DLEN;
localparam VMUL_MASK_SEGNUM_EEW16        = `CHUNJUN_VPU_DLEN_W / VMUL_DLEN;
localparam VMUL_MASK_SEGNUM_EEW32        = `CHUNJUN_VPU_DLEN_W / VMUL_DLEN;

localparam VMUL_MASK_SEGNUM_EEW08_W      = $clog2(VMUL_MASK_SEGNUM_EEW08);
localparam VMUL_MASK_SEGNUM_EEW16_W      = $clog2(VMUL_MASK_SEGNUM_EEW16);
localparam VMUL_MASK_SEGNUM_EEW32_W      = $clog2(VMUL_MASK_SEGNUM_EEW32);
 
localparam VWMUL_MASK_SEGNUM_EEW08       = `CHUNJUN_VPU_DLEN_W / VMUL_DLEN * 2;
localparam VWMUL_MASK_SEGNUM_EEW16       = `CHUNJUN_VPU_DLEN_W / VMUL_DLEN * 2;
localparam VWMUL_MASK_SEGNUM_EEW32       = `CHUNJUN_VPU_DLEN_W / VMUL_DLEN * 2;

localparam VWMUL_MASK_SEGNUM_EEW08_W     = $clog2(VWMUL_MASK_SEGNUM_EEW08);
localparam VWMUL_MASK_SEGNUM_EEW16_W     = $clog2(VWMUL_MASK_SEGNUM_EEW16);
localparam VWMUL_MASK_SEGNUM_EEW32_W     = $clog2(VWMUL_MASK_SEGNUM_EEW32);

//valu localparam(VALU0->normal alu;VALU1->widen alu;VALU2->widenw alu,narrow alu)

localparam VALU0_DATA_SEGNUM             = `CHUNJUN_VPU_DLEN_W / VALU_DLEN;
localparam VALU0_DATA_SEGNUM_W           = $clog2(VALU0_DATA_SEGNUM);

localparam VALU1_DATA_SEGNUM             = `CHUNJUN_VPU_DLEN_W / VALU_DLEN * 2;
localparam VALU1_DATA_SEGNUM_W           = $clog2(VALU1_DATA_SEGNUM);

localparam VALU2_DATA_SEGNUM             = `CHUNJUN_VPU_DLEN_W / VALU_DLEN * 2;
localparam VALU2_DATA_SEGNUM_W           = $clog2(VALU2_DATA_SEGNUM);

localparam VALU_LANE_EEW08               = VALU_DLEN / 08;
localparam VALU_LANE_EEW16               = VALU_DLEN / 16;
localparam VALU_LANE_EEW32               = VALU_DLEN / 32;

localparam VALU0_MASK_SEGNUM_EEW08       = `CHUNJUN_VPU_DLEN_W / VALU_DLEN;
localparam VALU0_MASK_SEGNUM_EEW16       = `CHUNJUN_VPU_DLEN_W / VALU_DLEN;
localparam VALU0_MASK_SEGNUM_EEW32       = `CHUNJUN_VPU_DLEN_W / VALU_DLEN;

localparam VALU0_MASK_SEGNUM_EEW08_W     = $clog2(VALU0_MASK_SEGNUM_EEW08);
localparam VALU0_MASK_SEGNUM_EEW16_W     = $clog2(VALU0_MASK_SEGNUM_EEW16);
localparam VALU0_MASK_SEGNUM_EEW32_W     = $clog2(VALU0_MASK_SEGNUM_EEW32);

localparam VALU1_MASK_SEGNUM_EEW08       = `CHUNJUN_VPU_DLEN_W / VALU_DLEN * 2;
localparam VALU1_MASK_SEGNUM_EEW16       = `CHUNJUN_VPU_DLEN_W / VALU_DLEN * 2;
localparam VALU1_MASK_SEGNUM_EEW32       = `CHUNJUN_VPU_DLEN_W / VALU_DLEN * 2;

localparam VALU1_MASK_SEGNUM_EEW08_W     = $clog2(VALU1_MASK_SEGNUM_EEW08);
localparam VALU1_MASK_SEGNUM_EEW16_W     = $clog2(VALU1_MASK_SEGNUM_EEW16);
localparam VALU1_MASK_SEGNUM_EEW32_W     = $clog2(VALU1_MASK_SEGNUM_EEW32);

localparam VALU2_MASK_SEGNUM_EEW08       = `CHUNJUN_VPU_DLEN_W / VALU_DLEN * 2;
localparam VALU2_MASK_SEGNUM_EEW16       = `CHUNJUN_VPU_DLEN_W / VALU_DLEN * 2;
localparam VALU2_MASK_SEGNUM_EEW32       = `CHUNJUN_VPU_DLEN_W / VALU_DLEN * 2;

localparam VALU2_MASK_SEGNUM_EEW08_W     = $clog2(VALU2_MASK_SEGNUM_EEW08);
localparam VALU2_MASK_SEGNUM_EEW16_W     = $clog2(VALU2_MASK_SEGNUM_EEW16);
localparam VALU2_MASK_SEGNUM_EEW32_W     = $clog2(VALU2_MASK_SEGNUM_EEW32);
 
localparam VALU_UVL_EEW08                = VALU_DLEN / 08;
localparam VALU_UVL_EEW16                = VALU_DLEN / 16;
localparam VALU_UVL_EEW32                = VALU_DLEN / 32;

localparam VALU_UVL_EEW08_W              = $clog2(VALU_UVL_EEW08);
localparam VALU_UVL_EEW16_W              = $clog2(VALU_UVL_EEW16);
localparam VALU_UVL_EEW32_W              = $clog2(VALU_UVL_EEW32);

localparam VALU_CMP_MAX_EEW08            = `CHUNJUN_VPU_DLEN_W / (VALU_DLEN / 08);
localparam VALU_CMP_MAX_EEW16            = `CHUNJUN_VPU_DLEN_W / (VALU_DLEN / 16);
localparam VALU_CMP_MAX_EEW32            = `CHUNJUN_VPU_DLEN_W / (VALU_DLEN / 32);

localparam VALU_CMP_MAX_EEW08_W          = $clog2(VALU_CMP_MAX_EEW08);
localparam VALU_CMP_MAX_EEW16_W          = $clog2(VALU_CMP_MAX_EEW16);
localparam VALU_CMP_MAX_EEW32_W          = $clog2(VALU_CMP_MAX_EEW32); 

//vdiv localparam
localparam VDIV_DATA_SEGNUM              = `CHUNJUN_VPU_DLEN_W / VDIV_DLEN;
localparam VDIV_DATA_SEGNUM_W            = $clog2(VDIV_DATA_SEGNUM);
 
localparam VDIV_MASK_SEGNUM_EEW08        = `CHUNJUN_VPU_DLEN_W / VDIV_DLEN;
localparam VDIV_MASK_SEGNUM_EEW16        = `CHUNJUN_VPU_DLEN_W / VDIV_DLEN;
localparam VDIV_MASK_SEGNUM_EEW32        = `CHUNJUN_VPU_DLEN_W / VDIV_DLEN;

localparam VDIV_MASK_SEGNUM_EEW08_W      = $clog2(VDIV_MASK_SEGNUM_EEW08);
localparam VDIV_MASK_SEGNUM_EEW16_W      = $clog2(VDIV_MASK_SEGNUM_EEW16);
localparam VDIV_MASK_SEGNUM_EEW32_W      = $clog2(VDIV_MASK_SEGNUM_EEW32);

localparam VDIV_UVL_EEW08                = VDIV_DLEN / 08;
localparam VDIV_UVL_EEW16                = VDIV_DLEN / 16;
localparam VDIV_UVL_EEW32                = VDIV_DLEN / 32;
 
localparam VDIV_UVL_EEW08_W              = $clog2(VDIV_UVL_EEW08);
localparam VDIV_UVL_EEW16_W              = $clog2(VDIV_UVL_EEW16);
localparam VDIV_UVL_EEW32_W              = $clog2(VDIV_UVL_EEW32);
 
//vext localparam
localparam VEXTVF2_DATA_SEGNUM           = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN * 2;
localparam VEXTVF4_DATA_SEGNUM           = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN * 4;
localparam VEXTVF8_DATA_SEGNUM           = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN * 8;
 
localparam VEXTVF2_DATA_SEGNUM_W         = $clog2(VEXTVF2_DATA_SEGNUM);
localparam VEXTVF4_DATA_SEGNUM_W         = $clog2(VEXTVF4_DATA_SEGNUM);
localparam VEXTVF8_DATA_SEGNUM_W         = $clog2(VEXTVF8_DATA_SEGNUM);
 
localparam VEXTVF2_MASK_SEGNUM           = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN * 2;
localparam VEXTVF4_MASK_SEGNUM           = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN * 4;
localparam VEXTVF8_MASK_SEGNUM           = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN * 8;
 
localparam VEXTVF2_MASK_SEGNUM_W         = $clog2(VEXTVF2_MASK_SEGNUM);
localparam VEXTVF4_MASK_SEGNUM_W         = $clog2(VEXTVF4_MASK_SEGNUM);
localparam VEXTVF8_MASK_SEGNUM_W         = $clog2(VEXTVF8_MASK_SEGNUM);
 
localparam VEXT_UVL_SEW08                = VMISC_DLEN / 08;
localparam VEXT_UVL_SEW16                = VMISC_DLEN / 16;
localparam VEXT_UVL_SEW32                = VMISC_DLEN / 32;
 
localparam VEXT_UVL_SEW08_W              = $clog2(VEXT_UVL_SEW08);
localparam VEXT_UVL_SEW16_W              = $clog2(VEXT_UVL_SEW16);
localparam VEXT_UVL_SEW32_W              = $clog2(VEXT_UVL_SEW32);
 
localparam VMISC_DATA_SEGNUM             = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN;
localparam VMISC_DATA_SEGNUM_W           = $clog2(VMISC_DATA_SEGNUM);
 
localparam VMERGE_NUM_SEW08              = `CHUNJUN_VPU_DLEN_W / 08;
localparam VMERGE_NUM_SEW16              = `CHUNJUN_VPU_DLEN_W / 16;
localparam VMERGE_NUM_SEW32              = `CHUNJUN_VPU_DLEN_W / 32;
 
localparam VMERGE_MASK_SEGNUM_SEW08      = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN;
localparam VMERGE_MASK_SEGNUM_SEW16      = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN;
localparam VMERGE_MASK_SEGNUM_SEW32      = `CHUNJUN_VPU_DLEN_W / VMISC_DLEN;
 
localparam VMERGE_MASK_SEGNUM_SEW08_W    = $clog2(VMERGE_MASK_SEGNUM_SEW08);
localparam VMERGE_MASK_SEGNUM_SEW16_W    = $clog2(VMERGE_MASK_SEGNUM_SEW16);
localparam VMERGE_MASK_SEGNUM_SEW32_W    = $clog2(VMERGE_MASK_SEGNUM_SEW32);
 
localparam VMISC_UVL_SEW08               = VMISC_DLEN / 08;
localparam VMISC_UVL_SEW16               = VMISC_DLEN / 16;
localparam VMISC_UVL_SEW32               = VMISC_DLEN / 32;

localparam VMISC_UVL_SEW08_W             = $clog2(VMISC_UVL_SEW08);
localparam VMISC_UVL_SEW16_W             = $clog2(VMISC_UVL_SEW16);
localparam VMISC_UVL_SEW32_W             = $clog2(VMISC_UVL_SEW32);


 
/////////////////////////////////////////////////////////////////////////////////////
//                   inst_class & inst_subclass define
/////////////////////////////////////////////////////////////////////////////////////
 
localparam VADD          = 4'h0;
localparam VSUB          = 4'h1;
localparam VRSUB         = 4'h2;
localparam VWADDU        = 4'h3;
localparam VWSUBU        = 4'h4;
localparam VWADD         = 4'h5;
localparam VWSUB         = 4'h6;
localparam VWADDUW       = 4'h7;
localparam VWSUBUW       = 4'h8;
localparam VWADDW        = 4'h9;
localparam VWSUBW        = 4'ha;
localparam VADC          = 4'hb;
localparam VMADC         = 4'hc;
localparam VSBC          = 4'hd;
localparam VMSBC         = 4'he;

localparam VSLL          = 4'h0;
localparam VSRL          = 4'h1;
localparam VSRA          = 4'h2;
localparam VNSRL         = 4'h3;
localparam VNSRA         = 4'h4;
localparam VSSRL         = 4'h5;
localparam VSSRA         = 4'h6;
localparam VNCLIPU       = 4'h7;
localparam VNCLIP        = 4'h8;

localparam VMSEQ         = 4'h0;
localparam VMSNE         = 4'h1;
localparam VAND          = 4'h2;
localparam VOR           = 4'h3;
localparam VXOR          = 4'h4;

localparam VMSLTU        = 4'h0;
localparam VMSLT         = 4'h1;
localparam VMSLEU        = 4'h2;
localparam VMSLE         = 4'h3;
localparam VMSGTU        = 4'h4;
localparam VMSGT         = 4'h5;
localparam VMINU         = 4'h6;
localparam VMIN          = 4'h7;
localparam VMAXU         = 4'h8;
localparam VMAX          = 4'h9;

localparam VSADDU        = 4'h0;
localparam VSADD         = 4'h1;
localparam VSSUBU        = 4'h2;
localparam VSSUB         = 4'h3;
localparam VAADDU        = 4'h4;
localparam VAADD         = 4'h5;
localparam VASUBU        = 4'h6;
localparam VASUB         = 4'h7;

localparam VMUL          = 4'h0;
localparam VMULH         = 4'h1;
localparam VMULHU        = 4'h2;
localparam VMULHSU       = 4'h3;
localparam VWMUL         = 4'h4;
localparam VWMULU        = 4'h5;
localparam VWMULSU       = 4'h6;
localparam VMACC         = 4'h7;
localparam VNMSAC        = 4'h8;
localparam VMADD         = 4'h9;
localparam VNMSUB        = 4'ha;
localparam VWMACCU       = 4'hb;
localparam VWMACC        = 4'hc;
localparam VWMACCSU      = 4'hd;
localparam VWMACCUS      = 4'he;
localparam VSMUL         = 4'hf;

localparam VREDSUM       = 4'h0;
localparam VREDMAXU      = 4'h1;
localparam VREDMAX       = 4'h2;
localparam VREDMINU      = 4'h3;
localparam VREDMIN       = 4'h4;
localparam VREDAND       = 4'h5;
localparam VREDOR        = 4'h6;
localparam VREDXOR       = 4'h7;
localparam VWREDSUMU     = 4'h8;
localparam VWREDSUM      = 4'h9;
 
localparam VMAND         = 4'h0;
localparam VMNAND        = 4'h1;
localparam VMANDN        = 4'h2;
localparam VMXOR         = 4'h3;
localparam VMOR          = 4'h4;
localparam VMNOR         = 4'h5;
localparam VMORN         = 4'h6;
localparam VMXNOR        = 4'h7;
localparam VCPOP         = 4'h8;
localparam VFIRST        = 4'h9;
localparam VMSBF         = 4'ha;
localparam VMSIF         = 4'hb;
localparam VMSOF         = 4'hc;
localparam VIOTA         = 4'hd;
localparam VID           = 4'he;
 
localparam VSLIDEUP      = 4'h0;
localparam VSLIDEDOWN    = 4'h1;
localparam VSLIDE1UP     = 4'h2;
localparam VSLIDE1DOWN   = 4'h3;
localparam VFSLIDE1UP    = 4'h4;
localparam VFSLIDE1DOWN  = 4'h5;
localparam VRGATHER      = 4'h6;
localparam VRGATHERI16   = 4'h7;
localparam VCOMPRESS     = 4'h8;
 
localparam VZEXTVF2      = 4'h0;
localparam VSEXTVF2      = 4'h1;
localparam VZEXTVF4      = 4'h2;
localparam VSEXTVF4      = 4'h3;
localparam VZEXTVF8      = 4'h4;
localparam VSEXTVF8      = 4'h5;
localparam VMERGE        = 4'h6;
localparam VMV           = 4'h7;
localparam VMVXS         = 4'h8;
localparam VMVSX         = 4'h9;
localparam VMVNR         = 4'ha;

localparam VDIVU         = 4'd0;
localparam VDIV          = 4'd1;
localparam VREMU         = 4'd2;
localparam VREM          = 4'd3;
/////////////////////////////////////////////////////////////////////////////////////
 
typedef struct packed{
logic [1:0]                                 vxrm            ;
logic [$clog2(4 + (2 + 4 ))-1:0]         inst_id         ;
logic                                       first_uop       ;
logic                                       last_uop        ;
logic [2:0]                                 lmul            ;
logic [`CHUNJUN_VPU_UVL_W-1:0]              uvl             ;
logic [2:0]                                 sew             ;
logic [3:0]                                 inst_class      ;
logic [3:0]                                 inst_subclass   ;
logic [`CHUNJUN_VPU_DLEN_W-1:0]             vs1_data        ;
logic [`CHUNJUN_VPU_DLEN_W-1:0]             vs2_data        ;
logic [`CHUNJUN_VPU_DLEN_W-1:0]             vs3_data        ;
logic [`CHUNJUN_VPU_DLEN_W/8-1:0]           v0_mask         ;
logic [4-1:0]   ch_oh           ;
logic [1-1:0]               core_id_oh      ;
logic                                       vm              ;
} vu_info_t;

typedef struct packed{
logic [$clog2(4 + (2 + 4 ))-1:0]         inst_id         ;
logic                                       first_uop       ;
logic                                       last_uop        ;
logic [`CHUNJUN_VPU_UVL_W-1:0]              uvl             ;
logic [SUB_TYPE_W-1:0]                      sub_type        ;
logic [1:0]                                 vxrm            ;
logic [2:0]                                 eew             ;
logic [4-1:0]   ch_oh           ;
logic [1-1:0]               core_id_oh      ;
logic [DLEN_IDX_W-1:0]                      dlen_idx        ;
logic                                       wb_c            ;
logic                                       v0_wb_c         ;
} vu_comm_t; 
  
typedef struct packed{
vu_comm_t                                   comm            ;
logic [VMUL_DLEN/8-1:0]                     ele_mask        ;
} vmul_comm_t;
 
typedef struct packed{
logic                                       uvl_eq0         ;
logic [$clog2(4 + (2 + 4 ))-1:0]         inst_id         ;
logic                                       first_uop       ;
logic                                       last_uop        ;
logic [SUB_TYPE_W-1:0]                      sub_type        ;
logic [2:0]                                 eew             ;
logic [4-1:0]   ch_oh           ;
logic [1-1:0]               core_id_oh      ;
} vredu_comm_t;
 
 typedef struct packed{
logic [$clog2(4 + (2 + 4 ))-1:0]         inst_id         ;
logic                                       first_uop       ;
logic                                       last_uop        ;
logic [4-1:0]   ch_oh           ;
logic [1-1:0]               core_id_oh      ;
logic [DLEN_IDX_W-1:0]                      dlen_idx        ;
logic                                       wb_c            ;
} vmask_comm_t;

typedef struct packed{
logic [$clog2(4 + (2 + 4 ))-1:0]         inst_id         ;
logic [4-1:0]   ch_oh           ;
logic [1-1:0]               core_id_oh      ;
logic [DLEN_IDX_W-1:0]                      dlen_idx        ;
logic                                       wb_c            ;
} vperm_comm_t;

typedef struct packed{
logic [`CHUNJUN_VPU_DLEN_W-1:0]             data            ;
logic [`CHUNJUN_VPU_DLEN_W-1:0]             bit_en          ;
logic [4-1:0]   ch_oh           ;
logic [1-1:0]               core_id_oh      ;
logic [$clog2(4 + (2 + 4 ))-1:0]         inst_id         ;
logic                                       wb_c            ;
logic                                       v0_wb_c         ;
logic                                       last            ;
logic                                       vxsat           ;
logic [4:0]                                 fflag           ;
} vu_wrbk_t;
  
typedef struct packed{
vu_wrbk_t                                   vd_res          ;
logic [4:0]                                 vd_id           ;
logic [`CHUNJUN_VPU_PATIAL_W-1:0]           vd_patial       ;
} vu_wrbk_ext_t;
 
endpackage




`define __WING_CBB_BUS_INF_PKG__
 
package axi_inf_pkg;
parameter ID_W   = 2  ;
parameter ADDR_W = 32 ;
parameter DATA_W = 32 ;
parameter RESP_W = 2  ;
 
// typedef logic [ID_W-1:0]   id_t    ;
// typedef logic [ADDR_W-1:0] addr_t  ;
// typedef logic [2:0]        size_t  ;
// typedef logic [7:0]        len_t   ;
// typedef logic [1:0]        burst_t ;
// typedef logic [3:0]        cache_t ;
// typedef logic [2:0]        prot_t  ;
// typedef logic [5:0]        atop_t  ; 
 
typedef struct packed {
    logic [ID_W-1:0]   awid        ;
    logic [ADDR_W-1:0] awaddr      ;
    logic [2:0]        awsize      ;
    logic [7:0]        awlen       ;
    logic [1:0]        awburst     ;
    logic              awlock      ;
    logic [3:0]        awcache     ;
    logic [2:0]        awprot      ;
    logic [5:0]        awatop      ;
    logic              awnse       ;
    logic              awmaster    ;
} axi_req_aw_t;
 
typedef struct packed {
    logic [ID_W-1:0]   arid        ;
    logic [ADDR_W-1:0] araddr      ;
    logic [2:0]        arsize      ;
    logic [7:0]        arlen       ;
    logic [1:0]        arburst     ;
    logic              arlock      ;
    logic [3:0]        arcache     ;
    logic [2:0]        arprot      ;
    logic              arnse       ;
    logic              armaster    ;
} axi_req_ar_t;
 
typedef struct packed {
    logic [DATA_W-1:0]   wdata    ;
    logic [DATA_W/8-1:0] wstrb    ;
    logic                wlast    ;
    logic                wpoison  ;
} axi_req_w_t;

typedef struct packed {
    logic [ID_W-1:0]     bid      ;
    logic [RESP_W-1:0]   bresp    ;
} axi_rsp_b_t;

typedef struct packed {
    logic [ID_W-1:0]       rid     ;
    logic [RESP_W-1:0]     rresp   ;
    logic [DATA_W-1:0]     rdata   ;
    logic                  rlast   ;
    logic                  rpoison ;
} axi_rsp_r_t;
endpackage
 
package axichk_inf_pkg ;
import axi_inf_pkg::*;
localparam ADDR_W = axi_inf_pkg::ADDR_W;
localparam DATA_W = axi_inf_pkg::DATA_W;
localparam ID_W   = axi_inf_pkg::ID_W;
typedef axi_inf_pkg::axi_req_aw_t axi_req_aw_t;
typedef axi_inf_pkg::axi_req_ar_t axi_req_ar_t;
typedef axi_inf_pkg::axi_req_w_t  axi_req_w_t ;
typedef axi_inf_pkg::axi_rsp_b_t  axi_rsp_b_t ;
typedef axi_inf_pkg::axi_rsp_r_t  axi_rsp_r_t ;
 
typedef struct packed {
    logic [((ID_W-1)/8):0]          awidchk     ;
    logic [((ADDR_W-1)/8):0]        awaddrchk   ;
    logic                           awlenchk    ;
    logic                           awctlchk0   ;
    logic                           awctlchk1   ;
    logic                           awctlchk3   ;
} axi_req_aw_chk_t;

typedef struct packed {
    logic [(DATA_W-1)/8:0]         wdatachk ;
    logic [((DATA_W-1)/64):0]      wstrbchk ;
    logic                          wlastchk ;
    logic [((DATA_W-1)/512):0]     wpoisonchk ;
} axi_req_w_chk_t;

typedef struct packed {
    logic [((ID_W-1)/8):0]         bidchk     ; 
    logic                          brespchk   ; 
} axi_rsp_b_chk_t;

typedef struct packed {
    logic [((ID_W-1)/8):0]         aridchk     ;
    logic [((ADDR_W-1)/8):0]       araddrchk   ;
    logic                          arlenchk    ;
    logic                          ararctlchk0 ;
    logic                          ararctlchk1 ;
} axi_req_ar_chk_t;

typedef struct packed {
    logic [((ID_W-1)/8):0]    ridchk     ; 
    logic [((DATA_W-1)/8):0]  rdatachk   ; 
    logic                     rlastchk   ; 
    logic [((DATA_W-1)/512):0]rpoisonchk ; 
    logic                     rrespchk   ; 
} axi_rsp_r_chk_t;

endpackage
 
package wxb_inf_pkg;
localparam ID_W   = 4  ;
localparam ADDR_W = 32 ;
localparam DATA_W = 32 ;
typedef struct packed {
    logic [ID_W-1:0]     id      ;
    logic [ADDR_W-1:0]   addr    ; 
    logic [1:0]          size    ;
    logic                write   ;
    logic [DATA_W-1:0]   wdata   ; 
    logic [DATA_W/8-1:0] wstrb   ;
    logic [1:0]          prot    ;     
    logic [3:0]          memattr ;
    logic [5:0]          atop    ;
    logic                excl    ;
    logic                master  ;
} wxb_req_info_t ;
 
typedef struct packed {
    logic [ID_W-1:0]     id      ;
    logic                err     ;
    logic [DATA_W-1:0]   rdata   ;
    logic                excl_ok ;
} wxb_rsp_info_t ;
endpackage


package axi2wxb_inf_pkg;
localparam AXI_ID_W   = axi_inf_pkg::ID_W    ;
localparam AXI_ADDR_W = axi_inf_pkg::ADDR_W  ;
localparam AXI_DATA_W = axi_inf_pkg::DATA_W  ;
typedef axi_inf_pkg::axi_req_aw_t axi_req_aw_t ; 
typedef axi_inf_pkg::axi_req_ar_t axi_req_ar_t ; 
typedef axi_inf_pkg::axi_req_w_t  axi_req_w_t  ; 
typedef axi_inf_pkg::axi_rsp_b_t  axi_rsp_b_t  ; 
typedef axi_inf_pkg::axi_rsp_r_t  axi_rsp_r_t  ;
 
localparam WXB_ID_W   = axi_inf_pkg::ID_W + 2;
localparam WXB_ADDR_W = AXI_ADDR_W ;
localparam WXB_DATA_W = AXI_DATA_W ;


typedef struct packed {
    logic [WXB_ID_W-1:0]     id      ;
    logic [WXB_ADDR_W-1:0]   addr    ; 
    logic [1:0]              size    ;
    logic                    write   ;
    logic [WXB_DATA_W-1:0]   wdata   ; 
    logic [WXB_DATA_W/8-1:0] wstrb   ;
    logic [1:0]              prot    ;     
    logic [3:0]              memattr ;
    logic [5:0]              atop    ;
    logic                    excl    ;
    logic                    master  ;
} wxb_req_info_t ;
 
typedef struct packed {
    logic [WXB_ID_W-1:0]  id      ;
    logic                 err     ;
    logic [WXB_DATA_W-1:0]rdata   ;
    logic                 excl_ok ;
} wxb_rsp_info_t ;

endpackage
 
package ahb_inf_pkg;
localparam ADDR_W = 32 ;
localparam DATA_W = 32 ;
localparam MASTER_W = 1 ;
typedef logic misc_t ;

typedef struct packed {
    logic [ADDR_W-1:0]     haddr     ;
    logic [2:0]            hburst    ;
    logic                  hmastlock ;
    logic [3:0]            hprot     ;
    logic [2:0]            hsize     ;
    logic [MASTER_W-1:0]   hmaster   ;
    logic                  hexcl     ;
    logic                  hwrite    ;
    misc_t                 misc      ;
} ahb_req_t ;

typedef struct packed {
    logic [DATA_W-1:0]     hrdata    ;
    logic                  hresp     ;
    logic                  hexokay   ;
} ahb_rsp_t ;
endpackage


package ahbchk_inf_pkg;
import ahb_inf_pkg::*;
localparam ADDR_W = ahb_inf_pkg::ADDR_W  ;
localparam DATA_W = ahb_inf_pkg::DATA_W  ;
typedef ahb_inf_pkg::misc_t    misc_t ;
typedef ahb_inf_pkg::ahb_req_t ahb_req_t ;
typedef ahb_inf_pkg::ahb_rsp_t ahb_rsp_t ;


typedef struct packed {
    logic [((ADDR_W-1)/8):0]          haddrchk ;
    logic                             hctclchk1; 
    logic                             hctclchk2; 
    logic                             hprotchk ;
    logic [((($bits(misc_t))-1)/8):0] hauserchk;
} ahb_req_chk_t ;

typedef struct packed {
    logic [((DATA_W-1)/8):0]          hrdatachk ;
    logic                             hrespchk  ;
} ahb_rsp_chk_t ;
 
endpackage
 
package ahbl2wxbl_inf_pkg;
parameter  ID_W     = 2 ;
parameter  ADDR_W   = 32;
parameter  DATA_W   = 32;
parameter  RESP_W   = 2 ;
localparam MASTER_W = 1 ;
typedef logic misc_t ;

typedef struct packed {
    logic [ADDR_W-1:0]     haddr     ;
    logic [2:0]            hburst    ;
    logic                  hmastlock ;
    logic [3:0]            hprot     ;
    logic [2:0]            hsize     ;
    logic [MASTER_W-1:0]   hmaster   ;
    logic                  hwrite    ;
    logic                  hexcl     ;
    misc_t                 misc      ;
} ahbl_req_t ;

typedef struct packed {
    logic [DATA_W-1:0]     hrdata    ;
    logic                  hresp     ;
    logic                  hexokay   ;
} ahbl_rsp_t ;

typedef struct packed {
    logic [ADDR_W-1:0]       addr    ; 
    logic [1:0]              size    ;
    logic                    write   ;
    logic [DATA_W-1:0]       wdata   ; 
    logic [DATA_W/8-1:0]     wstrb   ;
    logic [1:0]              prot    ;    
    logic [3:0]              memattr ;
    logic                    master  ;
    logic                    excl    ;
    misc_t                   misc    ;
} wxbl_req_info_t ;

typedef struct packed {
    logic                 err     ;
    logic [DATA_W-1:0]    rdata   ;
    logic [DATA_W-1:0]    excl_ok ;
} wxbl_rsp_info_t ;

endpackage
 
 
package axi2ahb_inf_pkg;

localparam AXI_ID_W   = axi_inf_pkg::ID_W      ;
localparam AXI_ADDR_W = axi_inf_pkg::ADDR_W    ;
localparam AXI_DATA_W = axi_inf_pkg::DATA_W    ;
typedef axi_inf_pkg::axi_req_aw_t axi_req_aw_t ; 
typedef axi_inf_pkg::axi_req_ar_t axi_req_ar_t ; 
typedef axi_inf_pkg::axi_req_w_t  axi_req_w_t  ; 
typedef axi_inf_pkg::axi_rsp_b_t  axi_rsp_b_t  ; 
typedef axi_inf_pkg::axi_rsp_r_t  axi_rsp_r_t  ;
 
localparam AHB_ADDR_W   = ahb_inf_pkg::ADDR_W   ;
localparam AHB_DATA_W   = ahb_inf_pkg::DATA_W   ;
localparam AHB_MASTER_W = ahb_inf_pkg::MASTER_W ;
typedef ahb_inf_pkg::ahb_req_t  ahb_req_t       ;
typedef ahb_inf_pkg::ahb_rsp_t  ahb_rsp_t       ;
 
endpackage


//===================================================================
// Date        : 2023-03-27
// Description : 
//
// Common Flip-Flops defines.
// 
// Summary of FF defines:
//   - WDFFR     : asynchronous reset
//   - WDFFER    : asynchronous reset and enable control
//   - WDFFENR   : enable control, without reset
//   - WDFFNR    : without reset
//   - WDFFRVAL  : asynchronous reset and reset value
//   - WDFFERVAL : asynchronous reset, reset value and enable control
//   - WNDFFER   : negedge clock, asynchronous reset and enable control
// 
// Instantiation:
//   WDFFR(signal_q, signal_d, clk, rst_n)
//   WDFFER(signal_q, signal_d, signal_en, clk, rst_n)
//   WDFFENR(signal_q, signal_d, signal_en, clk)
//   WDFFNR(signal_q, signal_d, clk)
//   WDFFRVAL(signal_q, signal_d, clk, rst_n, rstval)
//   WDFFERVAL(signal_q, signal_d, signal_en, clk, rst_n, rstval)
//   WNDFFER(signal_q, signal_d, signal_en, clk, rst_n)
//
//===================================================================

`ifndef __WING_CBB_DEFINE_DFF__
`define __WING_CBB_DEFINE_DFF__

//------------------------------------------------------------
// Flip-Flop with asynchronous reset
//  - reset value = '0
//  - NO enable control
//------------------------------------------------------------
`define WDFFR(__q, __d, __clk, __rst_n)               \
  always_ff @(posedge __clk or negedge __rst_n) begin \
    if (!__rst_n) begin                               \
        __q <= '0;                                    \
    end else begin                                    \
        __q <= __d;                                   \
    end                                               \
  end

//------------------------------------------------------------
// Flip-Flop with asynchronous reset and enable control
//  - reset value = '0
//  - HAS enable control
//------------------------------------------------------------
`define WDFFER(__q, __d, __en, __clk, __rst_n)        \
  always_ff @(posedge __clk or negedge __rst_n) begin \
    if (!__rst_n) begin                               \
        __q <= '0;                                    \
    end else if (__en) begin                          \
        __q <= __d;                                   \
    end                                               \
  end

//------------------------------------------------------------
// Flip-Flop with enable control, without reset
//  - NO reset
//  - HAS enable control
//------------------------------------------------------------
`define WDFFENR(__q, __d, __en, __clk)  \
  always_ff @(posedge __clk) begin      \
    if (__en) __q <= __d;               \
  end

//------------------------------------------------------------
// Flip-Flop without reset
//  - NO reset
//  - NO enable control
//------------------------------------------------------------
`define WDFFNR(__q, __d, __clk)    \
  always_ff @(posedge __clk) begin \
        __q <= __d;                \
  end

//------------------------------------------------------------
// Flip-Flop with asynchronous reset and reset value
//  - reset value is configurable
//  - NO enable control
//------------------------------------------------------------
`define WDFFRVAL(__q, __d, __clk, __rst_n, __rstval)  \
  always_ff @(posedge __clk or negedge __rst_n) begin \
    if (!__rst_n) begin                               \
        __q <= __rstval;                              \
    end else begin                                    \
        __q <= __d;                                   \
    end                                               \
  end

//------------------------------------------------------------
// Flip-Flop with asynchronous reset, reset value and enable
//  - reset value is configurable
//  - HAS enable control
//------------------------------------------------------------
`define WDFFERVAL(__q, __d, __en, __clk, __rst_n, __rstval) \
  always_ff @(posedge __clk or negedge __rst_n) begin       \
    if (!__rst_n) begin                                     \
        __q <= __rstval;                                    \
    end else if (__en) begin                                \
        __q <= __d;                                         \
    end                                                     \
  end

//------------------------------------------------------------
// Flip-Flop with asynchronous reset and enable control
//  - Negedge clock edge
//  - reset value = '0
//  - HAS enable control
//------------------------------------------------------------
`define WNDFFER(__q, __d, __en, __clk, __rst_n)       \
  always_ff @(negedge __clk or negedge __rst_n) begin \
    if (!__rst_n) begin                               \
        __q <= '0;                                    \
    end else if (__en) begin                          \
        __q <= __d;                                   \
    end                                               \
  end

//------------------------------------------------------------
// Flip-Flop with asynchronous reset and enable control
//  - Negedge clock edge
//  - reset value = '0
//  - HAS enable control
//------------------------------------------------------------
`define WNDFFR(__q, __d,__clk, __rst_n)       \
  always_ff @(negedge __clk or negedge __rst_n) begin \
    if (!__rst_n) begin                               \
      __q <= '0;                                      \
    end else begin                                    \
      __q <= __d;                                     \
    end                                               \
  end

`endif 
//===================================================================
// Date        : 2023-03-27
// Description : 
//
// Instantiation:
//  WCBB_AOMUX(__data_arr, __sel_in_oh0, __data_sel)
//  WCBB_BIN2ONEHOT(__bin_i, __onehot_o)
//  WCBB_ONEHOT2BIN(__onehot_i, __bin_o)
//  WCBB_PRIORITY_QUEUE_LSB(__vec_i, __onehot_o)
//  WCBB_PRIORITY_QUEUE_MSB(__vec_i, __onehot_o)
//  WCBB_NODE_1XN(__dest,                            
//               __valid_in , __ready_out, __info_in,
//               __valid_out, __ready_in , __info_out)
//  WCBB_NODE_NX1(__sel,                          
//                __valid_in , __ready_out, __info_in,
//                __valid_out, __ready_in , __info_out)
//===================================================================

`ifndef __WING_CBB_DEFINE_MISC__
`define __WING_CBB_DEFINE_MISC__

//--------------------------------------------------//
//---------------------AOMUX------------------------//
//--------------------------------------------------//

`define WCBB_AOMUX(__data_arr, __sel_in_oh0, __data_sel) \
always_comb begin                                        \
  __data_sel = '0;                                       \
  for (int ii=0; ii < $bits(__sel_in_oh0); ii++) begin : g_``__data_sel \
    __data_sel = (__data_arr[ii] &                       \
                  {$bits(__data_sel){__sel_in_oh0[ii]}}) \
               | __data_sel;                             \
  end                                                    \
end                    

//--------------------------------------------------//
//------------------bin2onehot----------------------//
//--------------------------------------------------//
`define WCBB_BIN2ONEHOT(__bin_i, __onehot_o)          \
for (genvar ii=0; ii<$bits(__onehot_o); ii++) begin : g_``__onehot_o \
  assign __onehot_o[ii] = (__bin_i==ii);            \
end     

//--------------------------------------------------//
//------------------onehot2bin----------------------//
//--------------------------------------------------//
`define WCBB_ONEHOT2BIN(__onehot_i, __bin_o)          \
always_comb begin                                     \
  localparam LOC_VEC_W = $bits(__onehot_i);           \
  localparam LOC_BIN_W = $bits(__bin_o);              \
  __bin_o = '0;                                       \
  for (int ii=0; ii < LOC_VEC_W; ii++) begin : g_``__bin_o      \
    __bin_o = ({LOC_BIN_W{__onehot_i[ii]}} & (LOC_BIN_W)'(ii)) \
            | __bin_o;                                \
  end                                                 \
end

//--------------------------------------------------//
//---------------Priority Queue LSB-----------------//
//--------------------------------------------------//
`define WCBB_PRIORITY_QUEUE_LSB(__vec_i, __onehot_o) \
always_comb begin                                  \
  logic [$bits(__vec_i)-1:0] __vec_adj_or;         \
                                                   \
  __vec_adj_or[0] = 1'b0;                          \
  for (int ii=1; ii<$bits(__vec_i); ii++) begin : g_``__onehot_o \
    __vec_adj_or[ii] = __vec_i     [ii-1] |        \
                      __vec_adj_or[ii-1] ;         \
  end                                              \
                                                   \
  __onehot_o = __vec_i & ~__vec_adj_or;            \
end

//--------------------------------------------------//
//---------------Priority Queue MSB-----------------//
//--------------------------------------------------//
`define WCBB_PRIORITY_QUEUE_MSB(__vec_i, __onehot_o) \
always_comb begin                                  \
  logic [$bits(__vec_i)-1:0] __vec_adj_or;         \
                                                   \
  __vec_adj_or[$bits(__vec_i)-1] = 1'b0;           \
  for (int ii=$bits(__vec_i)-2; ii>=0; ii--) begin : g_``__onehot_o \
    __vec_adj_or[ii] = __vec_i     [ii+1] |        \
                      __vec_adj_or[ii+1] ;         \
  end                                              \
                                                   \
  __onehot_o = __vec_i & ~__vec_adj_or;            \
end


`endif 
`endif //_CHUNJUN_LIB_DEFINE_
